Four SMA female interfaces. Last photo below is from different unused sample. Different sample (unused) of this model has been verified working well from 12.20x to 12.29x Gb/s. DIN: Data input. DOUT: Data output. COUT: clock output. We guess other pinout means following: Vth: VTH 86 Voltage threshold adjust for differential data input buffer. Can also be used to set DC bias voltage on DIN when NDIN used as single ended input. Can be floated if not used. input LOS Receiver Loss-of-Signal Indicator, TTL . This output goes high when the input signal drops below the programmed threshold. LOS Threshold Input, Analog. A voltage applied to this input sets the LOS assert threshold. The LOS power detector can be disabled if VTH is connected to VCC, which forces LOS low. LOS: Loss-of-Signal Monitor The LOS output indicates low, receive-signal power. The LOS output is asserted high when the input signal is below the threshold set by VTH. VTH = 10 x VLOS_ASSERT(mVP-P) (typ) It seems LOC means Loss-of-Clock Monitor. The PS could be phase shift or phase adjustment. See some info (see htm link below from google) below, Model Features and Benefits Clock and Data Recovery ------------------------------------------------------------------------------------------- MTC5585 . filter-based CDR module with high jitter tolerance . operates at 9.9 Gb/s ------------------------------------------------------------------------------------------- MTC5589 Same as MTC5585 except operating at 10.7 Gb/s ------------------------------------------------------------------------------------------- MTC5585D Same as MTC5585 except operating at 12.3 Gb/s ------------------------------------------------------------------------------------------- MTC5590 CDR that extracts the signal timing from incoming data